For power devices, 150 mm (6-inch) SiC wafers are currently the better choice for most manufacturers, but 200 mm (8-inch) wafers are the clear future direction. This article compares the two diameters across cost, defect density, device performance, and supply chain to help you decide which is right for your application.
Why Wafer Size Matters for Power Devices
Silicon carbide (SiC) is a wide-bandgap semiconductor that enables power devices to operate at higher voltages, temperatures, and switching frequencies than silicon. The wafer size directly affects manufacturing economics: a larger wafer yields more die per process run, but it also demands more advanced crystal growth and fabrication equipment. For power devices like MOSFETs and Schottky diodes, the die are large (often 5–20 mm²), so the number of chips per wafer is lower than for logic chips. Consequently, the cost per die is heavily influenced by the usable area and edge exclusion.
Current State of SiC Wafer Production
As of 2025, the industry predominantly uses 150 mm SiC wafers. Most commercial SiC substrates are grown by the physical vapor transport (PVT) method, which produces boules that are then sliced into wafers. Yields for 150 mm are mature, and the supply chain—including substrates, epitaxy, and fabrication—is well established. Several leading manufacturers are ramping up 200 mm production, but it remains a smaller fraction of total output. The transition to 200 mm is happening now, driven by the same cost-per-die logic that pushed silicon from 200 mm to 300 mm.
Cost Comparison: 150 mm vs 200 mm
The primary advantage of 200 mm wafers is that they offer about 78% more usable area than 150 mm wafers (π×100² vs π×75², ignoring edge exclusion). That means roughly 1.7 to 1.8 times more die per wafer, which can lower the cost per die if the defect density is comparable. However, the cost of a 200 mm SiC substrate is currently higher per unit area due to lower yields in crystal growth and more challenging slicing. The break-even point depends on defect density and die size. For large power dies (e.g., 10 mm²), the edge exclusion is a smaller fraction, so the area advantage is more fully realized. For smaller dies, the benefit is slightly less but still significant.
In practice, many manufacturers report that 200 mm becomes cost-effective when the defect density (killer defects per cm²) is below about 0.5, which is now achievable for some producers. If your defect density is higher, the advantage shrinks because more die are lost.
Defect Density and Yield
Defect density is the most critical factor in wafer economics. SiC wafers contain micropipes, dislocations, and other crystal defects that can render a die nonfunctional. 150 mm wafers have been optimized for years, with commercial defect densities around 0.1–0.3 cm² for micropipes, though basal plane dislocations remain a challenge. 200 mm wafers are newer, and defect densities are typically higher—often 0.5–1.0 cm² initially. However, as process maturity improves, the gap is closing. For high-voltage devices (>1200 V), defects are particularly detrimental because they can cause premature breakdown. Therefore, a 150 mm wafer with low defect density may yield more good die than a 200 mm wafer with high defect density, despite the area advantage.
Device Performance and Electrical Characteristics
Wafer size itself does not directly affect the electrical performance of a single device. The performance is determined by the epitaxial layer quality, device design, and fabrication process. However, wafer size can indirectly influence performance through thermal stress and uniformity. Larger wafers are more prone to bow and warp, which can cause non-uniformities in lithography and etching. This can lead to variations in threshold voltage or on-resistance across the wafer. For power devices, where consistency is key, 150 mm wafers currently offer better uniformity. As 200 mm processing matures, these issues are being mitigated with improved clamping and stress control.
Supply Chain and Ecosystem
The supply chain for 150 mm SiC is robust: multiple substrate suppliers, epitaxy services, and fabrication plants are available. Equipment for 150 mm is often repurposed from older silicon fabs, which lowers capital expenditure. In contrast, 200 mm SiC requires dedicated equipment that is more expensive and less available. For a company entering the SiC market, starting with 150 mm is easier and less risky. However, if you are planning a high-volume production for automotive or industrial applications, the long-term cost benefits of 200 mm may justify the upfront investment.
How to Choose: A Practical Guide
When deciding between 150 mm and 200 mm SiC wafers, consider the following factors:
- Production volume: If you produce more than ~100,000 wafers per year, 200 mm is likely to be more economical.
- Defect density: If your process can achieve a defect density below 0.5 cm² on 200 mm, the area advantage wins.
- Die size: For large power dies (>10 mm²), the edge exclusion is less significant, so 200 mm is more attractive.
- Capital availability: 200 mm requires higher upfront investment; 150 mm is cheaper to start.
- Technology roadmap: If you need to scale to 200 mm eventually, starting there may save transition costs.
In summary, for most current applications, 150 mm is the safer, more cost-effective choice. But if you are planning for the next five years and have the resources, 200 mm is the direction the industry is heading.
Frequently Asked Questions
Is 200 mm SiC wafer the same as 8-inch?
Yes, 200 mm is the metric equivalent of 8 inches. The industry uses both terms interchangeably. Similarly, 150 mm is often called 6-inch.
Why is SiC wafer size limited to 200 mm?
SiC is a very hard material, and growing large, defect-free crystals is difficult. The PVT process currently produces boules up to 200 mm in diameter, but 300 mm is not yet feasible at commercial quality. Research is ongoing, but it will take years to overcome the crystal growth challenges.
Does wafer size affect the maximum voltage rating of a device?
No, the voltage rating is determined by the epitaxial layer thickness and doping, not the wafer diameter. A 150 mm and a 200 mm wafer can produce devices with the same voltage rating if the epitaxy is identical.
Which wafer size is used in Tesla’s SiC inverters?
Tesla has not publicly disclosed the exact wafer size, but industry reports suggest that most SiC devices in EVs are currently fabricated on 150 mm wafers. As 200 mm ramps up, newer models may switch to 200 mm for cost reasons.
Can I use 150 mm equipment for 200 mm wafers?
No, most equipment is designed for a specific wafer size. Some tools can be upgraded, but it is often more cost-effective to purchase new 200 mm equipment. The cassette, transport, and processing chambers are different.
What is the typical price difference between 150 mm and 200 mm SiC wafers?
Prices vary widely by volume and quality, but as of 2025, 200 mm wafers are roughly 30–50% more expensive per wafer than 150 mm. However, because they yield more die, the cost per die can be lower if yields are good.
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