TSMC vs Samsung vs Intel Foundry: Which to Choose?

For chip designers, the choice between TSMC, Samsung Foundry, and Intel Foundry comes down to a trade-off: TSMC offers the most mature process nodes and the highest yield, Samsung often leads in aggressive transistor architecture and pricing, while Intel Foundry is the new entrant with a focus on US-based manufacturing and advanced packaging. This article compares the three foundries across process technology, yield, cost, capacity, and ecosystem to help you decide which one fits your design.

Background: The Three Foundry Players

TSMC (Taiwan Semiconductor Manufacturing Company) has been the dominant pure-play foundry for decades, producing chips for Apple, NVIDIA, AMD, and Qualcomm. Samsung Foundry, a division of Samsung Electronics, has been a strong second, known for its aggressive adoption of new transistor structures like Gate-All-Around (GAA). Intel Foundry, launched in 2021 as Intel Foundry Services (IFS), is the newest entrant, leveraging Intel’s decades of manufacturing expertise and its recent push into leading-edge nodes.

Each foundry has its own roadmap and philosophy. TSMC’s roadmap emphasizes incremental improvements to its FinFET process, while Samsung has moved to GAA (which it calls MBCFET) starting with its 3nm node. Intel is betting on its “5 nodes in 4 years” plan, with Intel 18A (1.8nm-class) expected to be its first node using PowerVia and RibbonFET (GAA) transistors.

How the Foundries Compare: Process Nodes

Process node names have become marketing labels rather than physical dimensions, so comparing “5nm” across foundries is misleading. What matters is transistor density, power, and performance.

• TSMC: N3 (3nm) is in high-volume production, with N3E, N3P, and N2 (2nm) on the roadmap. TSMC’s N2 will use GAA transistors (called Nanosheet).
• Samsung: 3nm GAA (3GAE, 3GAP) is in production, with 2nm (2GAP) planned. Samsung has been first to GAA, but early yields were reportedly low.
• Intel: Intel 7 (10nm-class) is in production for its own CPUs, Intel 4 (7nm-class) is ramping, Intel 3 is coming, and Intel 18A (1.8nm-class) is targeted for 2025. Intel 18A will be the first to combine RibbonFET and PowerVia.

In terms of density, TSMC’s N3 is generally considered the densest among the three at comparable nodes, but Samsung’s 3nm GAA may offer better power efficiency per transistor due to the GAA structure.

Yield and Maturity: The Real Decider

Yield – the percentage of functional chips on a wafer – is the single biggest factor in cost and time-to-market. A new process node typically starts with low yield (20-50%) and improves over time. TSMC has historically achieved higher yields faster than Samsung. For example, TSMC’s N5 hit 70% yield within a year, while Samsung’s 5nm took longer to reach similar levels. Intel’s foundry is unproven at leading-edge for external customers, so designers face more risk.

For high-volume consumer chips, a 10% yield difference can mean millions of dollars in cost. For low-volume, high-margin chips (like AI accelerators), yield is less critical.

Cost: Wafer Price and Design Cost

Wafer prices are not publicly disclosed, but industry estimates suggest TSMC’s leading-edge wafers are the most expensive, followed by Samsung and Intel. However, total cost includes design cost (mask sets, IP, engineering time) and yield. A cheaper wafer with low yield can be more expensive per good die.

Design cost for a leading-edge chip (5nm-class) is estimated at $500M+, including R&D and mask costs. Samsung and Intel may offer lower wafer prices or incentives to attract customers, but the lack of mature IP and design tools can increase engineering costs.

Capacity and Supply Chain

TSMC has the largest capacity and most flexible manufacturing, but it is concentrated in Taiwan, a geopolitical risk. Samsung has fabs in South Korea and the US (Austin), while Intel has fabs in the US, Ireland, and Israel. For designers needing US-based manufacturing (for defense or government contracts), Intel Foundry is the only option among the three. For those needing massive volume quickly, TSMC is the safest bet.

Intel Foundry is building two new fabs in Arizona and Ohio, with planned capacity for external customers. However, it is still years away from matching TSMC’s scale.

Ecosystem and IP Availability

TSMC has the most mature ecosystem: PDKs, IP blocks, third-party libraries, and design services. Samsung’s ecosystem is smaller but growing, with support from Synopsys and Cadence. Intel Foundry is building its ecosystem from scratch, but it has the advantage of Intel’s own IP (x86 cores, Ethernet, etc.) and its acquisition of Tower Semiconductor for specialty processes.

For a startup, TSMC’s ecosystem is the easiest to navigate. For a company with existing Intel IP, Intel Foundry might be attractive.

Common Problems and How to Choose

Common problems designers face include: choosing a node that is too new (low yield, missing IP), underestimating design complexity, and ignoring supply chain risks. To choose:

1. List your requirements: performance, power, area, volume, cost target, and delivery timeline.
2. Check IP availability: if you need a specific SerDes or memory controller, see which foundry has it.
3. Evaluate yield projections: ask the foundry for yield data on similar designs.
4. Consider geopolitical risk: if your product is for defense, US-based manufacturing is a must.
5. Run a cost model: compare total cost per good die across foundries.

For most commercial chips, TSMC is the safe default. For cost-sensitive designs where you can tolerate some yield risk, Samsung may be viable. For US government contracts or if you want to leverage Intel’s packaging technology, Intel Foundry is worth considering.

Advanced Packaging: The Hidden Differentiator

Advanced packaging is becoming as important as the transistor node. TSMC offers CoWoS (Chip-on-Wafer-on-Substrate) and InFO, used by NVIDIA and Apple. Samsung has its I-Cube and X-Cube. Intel has EMIB (Embedded Multi-die Interconnect Bridge) and Foveros (3D stacking), which are proven in its own products.

If your design requires chiplets or 3D stacking, Intel’s Foveros is arguably the most mature. TSMC’s CoWoS is the industry standard for HBM integration. Samsung’s packaging is less proven but may be cheaper.

Future Roadmaps and Risks

TSMC’s N2 (2nm) is expected in 2025, with backside power delivery (BSPDN) planned for N2P. Samsung’s 2nm is also 2025, but it has struggled with yield on 3nm. Intel’s 18A is targeted for 2025, and Intel has already signed up Microsoft as a customer. The risk with Intel is execution: Intel has missed process deadlines before. The risk with Samsung is yield. The risk with TSMC is geopolitical.

For designers, the safest strategy is to design with a node that is in high-volume production, not the latest one. That means TSMC N3 or N5, Samsung 4nm, or Intel 7 (if you can tolerate its older design rules).

Frequently Asked Questions

Is Samsung Foundry cheaper than TSMC?

Generally, Samsung offers lower wafer prices to attract customers, but the total cost per good die depends on yield. If Samsung’s yield is lower, the cost advantage disappears. For mature nodes (like 8nm), Samsung can be significantly cheaper.

Can Intel Foundry make chips for AMD?

Technically yes, but AMD is a direct competitor to Intel, so it is unlikely to use Intel Foundry for its main CPUs. AMD uses TSMC for all its leading-edge chips.

Which foundry has the best 3nm process?

TSMC’s N3 is considered the best in terms of yield and maturity. Samsung’s 3nm GAA has better theoretical power efficiency but has suffered from low yield. Intel’s 3nm-class node (Intel 3) is not yet available to external customers.

How long does it take to tape out a chip?

A leading-edge chip (5nm) can take 12-18 months from design to tapeout, plus 3-6 months for manufacturing. Using a mature node can shorten this to 6-9 months.

Do I need to use the foundry’s own IP?

No, you can use third-party IP from ARM, Synopsys, or Cadence, but the foundry’s own IP (like TSMC’s memory compilers) is often more optimized. Each foundry has its own set of standard cells and I/O libraries.

What is the risk of using a new foundry like Intel?

The main risk is execution: Intel has missed process deadlines in the past, and its ecosystem is immature. However, Intel offers unique packaging technologies and US-based manufacturing, which can be worth the risk for certain applications.

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